Hyperscaler SMR-ESS Behind-the-Meter Networks: What Changes in the Islanding Interlock

Bottom line first. In an SMR (small modular reactor)-ESS behind-the-meter network contracted directly by a hyperscaler, the islanding interlock must be made redundant wherever the connection to the KEPCO grid is a single point and data centre load changes abruptly. Conversely, if the SMR exports its entire output to the grid and the data centre is supplied under a separate supply contract, the existing interlock scheme of the incoming substation can be used as is, so the scope of redesign is narrow. The trend of hyperscaler direct nuclear contracts passing 13 deals and a total of 9.8GW as of May 2026 points toward more of the first configuration.

Isometric behind-the-meter microgrid: SMR, ESS and grid-forming PCS feeding a data center through one PCC breaker
The more the connection is a single point and the more often load changes abruptly, the more hard-wired redundancy of the islanding interlock takes priority over software decisions.

1. Background: why SMR-ESS behind-the-meter networks now

With AI data centre power demand surging, cases of big tech companies contracting directly with nuclear plants, including SMRs, have been rising quickly through 2026. As of May 2026, hyperscaler nuclear contracts numbered 13, totalling more than 9.8GW. The US government has also ordered rapid deployment of advanced reactors, citing national security and manufacturing expansion, and has set a goal of fielding SMRs at defense and energy department facilities by September 2028.

Reading this trend as simply “one more power source” leads to wrong decisions. Connecting an SMR directly to a data centre behind-the-meter network creates a point where the reactor’s load-following characteristics collide head-on with the abrupt swings of IT load. What fills that gap is ESS and grid-forming PCS, and the islanding interlock design is the item that has to be settled ahead of them.

2. Where it wins: sites with a single connection point and constant abrupt load changes

The current condition is this. At a site where SMR, ESS and data centre are tied into one behind-the-meter network and the connection to the KEPCO grid is a single point (PCC, Point of Common Coupling), a grid-side fault or an SMR output fluctuation can directly affect IT load stability. In fact, in a demonstration assuming an AI data centre environment, grid-forming inverters reduced the current variability passed to the grid during abrupt load changes by about 75%.

Make the islanding interlock redundant at such a site and here is what changes. The breaker trip logic at the PCC is built as two paths, a hard-wired path and a relay protection coordination path, and a basis is established for transferring the behind-the-meter network from the grid to independent (islanded) operation if any one of three conditions occurs: SMR output fault, ESS SOC fault, or abrupt IT load change.

The connecting logic is here. In a single-connection-point structure, the cost of interlock redundancy acts as insurance against a full data centre shutdown during a grid fault, so building it in at the initial design stage costs less than retrofitting after completion.

3. Where it doesn’t: SMR exports everything to the grid, data centre on separate supply

The opposite condition is just as clear. If the SMR exports all of its output to the grid and the data centre receives power separately through ordinary incoming supply equipment, there is no direct electrical link between the SMR and the data centre, and little need to design a new islanding interlock.

Apply a behind-the-meter interlock scheme as is at such a site and here is what changes. Time and money go into protection coordination designed around a PCC that does not exist, producing redundancy investment that is not actually needed. In most cases, the standard protective relaying of the existing incoming substation (overcurrent, overvoltage and undervoltage relays) is enough.

4. Comparison table: interlock requirements by connection structure

Item SMR-ESS behind-the-meter (single PCC) SMR full export + separate supply
Islanding interlock Hard-wired redundancy required Standard protective relaying is enough
Need for grid-forming PCS High (absorbs abrupt load changes) Low (the grid provides inertia)
ESS role Compensates for SMR load-following lag General peak load response
PCC protection coordination Monitors three conditions (SMR, ESS, load) Standard overcurrent and overvoltage relays
Redesign cost Relatively low if built in early Not applicable

The row to watch in the table is “PCC protection coordination”. In a behind-the-meter structure, three conditions have to be monitored simultaneously: SMR output fault, ESS SOC fault and abrupt IT load change, and handling any one of them by software decision alone departs from the safety interlock principle.

5. Islanding interlock logic example (conceptual)

Safety interlock conditions must be checked first. The following is pseudocode for conceptual explanation only; actual settings depend on the site relay specifications and the SMR and ESS manufacturers’ interface specifications.

# SMR-ESS behind-the-meter islanding interlock - conceptual example
# I/O mapping
# AI001 : PCC voltage (V, sampled in ms)
# AI002 : PCC frequency (Hz)
# DI001 : SMR output fault signal (contact output from reactor protection system)
# DI002 : ESS SOC low alarm (contact output from BMS)
# DO001 : PCC breaker trip relay (hard-wired, no SW bypass)
# DO002 : Behind-the-meter islanding mode transfer signal

VOLTAGE_LOW = 0.9   # p.u., undervoltage threshold (example, re-set based on field measurement)
FREQ_BAND   = 0.5   # Hz, frequency deviation band (example)

def evaluate_islanding_interlock(v_pu, freq_dev, smr_fault, load_step_kw):
    # Safety interlock checked first - reactor protection signals take the hard-wired path
    if smr_fault:
        return "DO001_HARDWIRE_TRIP"  # SMR-side faults are not replaced by a software decision

    # Transfer to islanding on PCC voltage/frequency fault together with abrupt load change
    if v_pu < VOLTAGE_LOW and abs(freq_dev) > FREQ_BAND:
        return "DO002_ISLANDING_MODE"

    return "GRID_CONNECTED"

This logic is for conceptual explanation. Actual thresholds and trip sequences must be finalised through the SMR manufacturer’s protection system interface specification and field measurement data, and the possibility of malfunction due to communication delay or noise requires waveform analysis and field measurement.

6. Boundary conditions and selection criterion

The point where this judgement flips is clear. If there is no direct electrical link between the SMR and the data centre and each is connected to the grid independently, behind-the-meter interlock redundancy is over-investment. Only in a behind-the-meter configuration with a single connection point does islanding interlock redundancy become the first item to review. The principle that safety circuits, including EMO, are never bypassed by software alone applies equally in every configuration.

References

Scroll to Top