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Standby Generator and UPS Coordination — Size Battery Backup for One Failed Start and the Interval When the UPS Rejects the Generator
The core coordination failure is a running generator the UPS will not accept. Frequency window, staggered pickup, recharge current and bypass sync on a time chart.
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SVC vs STATCOM: Choose Reactive Compensation by Its Output at the Moment Voltage Drops
Same rated Mvar, but at 0.5 pu an SVC delivers 25 % and a STATCOM 50 %. Access and energizing interlocks, slope voltage control and the boundary conditions.
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OCR and OCGR Protection Coordination — Check Only the Maximum Fault Current and the Curves Cross
Relays with different curve types can swap order at minimum fault current. Worked IEC inverse-time example, separate OCGR coordination and close-permit logic.
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HVDC vs HVAC: For Long-Distance Transmission, the Cable Section Decides Before Distance Does
On submarine and underground cable, charging current sets a limit before distance does. Charging current calculation, the LCC/VSC split and station interlocks.
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Transformer Parallel Operation — Why Two Identical Units Can’t Deliver Their Combined Rating, and the Closing Interlocks
Impedance mismatch trims usable parallel capacity without any alarm. Load sharing, circulating current, tap master-follower and bus-tie closing interlocks.
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Industrial UPS: Power System Basics for Outage Response
A UPS fills the gap at the moment of an outage so equipment can stop safely or keep running. Standby, line-interactive, and online types compared.
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45 GW of Data Centre UPS: The Circuits and Interlocks Behind a 0 ms Transfer Time
The criterion for choosing a UPS is transfer time (ms), not kVA. IEC 62040-3 classes, backup time sizing code, an I/O map and an interlock checklist.
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GE Vernova’s Grid-Forming Patent: Creating Inertia with Virtual Impedance
GE Vernova’s grid-forming inverter virtual impedance tuning patent US12009770B2 and the limits of applying it.
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The 3.8 GW Simultaneous Data Center Load Loss and Ride-Through Criteria
Low-voltage ride-through for large loads after 3.8 GW of data center load dropped at once. Design conditions based on the gap between 60-200 ms fault clearing and 10-50 ms load tripping.
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Hyperscaler SMR-ESS Behind-the-Meter Networks: What Changes in the Islanding Interlock
Islanding interlock design for SMR-ESS behind-the-meter networks. Whether there is a single connection point decides the need for hard-wired redundancy.